Instruction set architecture
Computer Organization and Architecture · Engineering
Study notes
Add two memory variables: CISC x86 does 'add [a], [b]' in one instruction (memory to memory). RISC ARM needs three: 'ldr r0,[a]; ldr r1,[b]; add r2,r0,r1; str r2,[a]'. CISC is compact; RISC is regular and pipelines cleanly. Both compute the same sum.