CMOS inverter: operation, characteristics
VLSI Design · Engineering
Study notes
Input 0: PMOS on, output 1; input 1: NMOS on, output 0. No static current (one always off): low power. VTC steep: noise margin. Basis of all logic.
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VLSI Design · Engineering
Input 0: PMOS on, output 1; input 1: NMOS on, output 0. No static current (one always off): low power. VTC steep: noise margin. Basis of all logic.